1. Field of the Invention
The present invention relates to a microcontroller and a method of detecting errors thereof. The present invention is applicable to, e.g., a microcontroller having a function of detecting the error of a CPU (Central Processor Unit) or similar structural part included therein.
2. Description of the Background Art
A microcontroller including a CPU can accurately operate so long as the CPU executes program sequences in an expected manner. When an error occurs in the CPU, the CPU goes out of control, or crashes, in executing program sequences to cause the microcontroller to malfunction. Therefore, in order to protect the microcontroller from malfunction ascribable to the crash of the CPU for thereby enhancing the reliability of the microcontroller, an error detecting circuit configured to detect the crash of the CPU and errors in other structural parts is essential for the microcontroller.
FIG. 1 shows a specific conventional microcontroller including an error detecting circuit. The microcontroller, generally 20, includes a CPU 21, a power-on reset circuit 22, a watchdog timer 23, an error detector circuit 24, and an OR gate 25 interconnected as illustrated. At the time of power-up, the CPU 21 is reset, or initialized, in response to a power-on reset signal output from the power-on reset circuit 22 and an overflow signal output from the watchdog timer 23.
The CPU 21 thus initialized delivers a timer start signal having a preselected period to the watchdog timer 23. The watchdog timer 23 monitors the timer start signal to see if the timer start signal has the preselected period and a preselected pulse width and if the signal stopping is accurately processed. Thereafter, the CPU 21 executes certain program sequences as usual. When an error or malfunction occurs in the CPU 21, the watchdog timer 23 delivers an overflow signal to the error detector 24. In response, the error detector 24 determines the error in the CPU 21 and sends out a stop signal to the CPU 21 for thereby stopping the operation of the CPU 21, or otherwise the CPU 21 would be out of control.
However, should the watchdog timer 23 involve an error and be fixed to prevent the overflow signal from being output, the crash or out-of-control state of the CPU 21 would continue. In order to avoid such a case, the CPU 21 is adapted to stop sending out the timer start signal to thereby cause the watchdog timer 23 to output the overflow signal and the error detector 24 to diagnose the watchdog timer 23. At the same time, the error detector 24 receives the power-on reset signal from the power-on reset circuit 22 and diagnoses the reset circuit 22. In this manner, the error detector 24 detects errors in the watchdog timer 23 and the power-on reset circuit 22 to determine an error in the CPU 21 or similar structural part of the microcontroller.
The problem with the conventional microcontroller 20 is that the error detector 24 cannot detect an error occurring in itself although it can detect errors of the power-on reset circuit 22 and watchdog timer 23. More specifically, when an error occurs in the error detector 24 and the power-on reset circuit 22 and watchdog timer 23 deliver signals representative of their errors to the error detector 24, the error detector 24 cannot cease the operation of the CPU 21. There would be a possibility that the CPU 21 goes out of control and causes a critical error to occur in the microcontroller system.